A conventional computer system may include an input/output (I/O) device coupled to a main processor and a memory via a peripheral component interconnect express (PCIe) interconnect. Such a computer system may include accelerator logic coupled to the PCIe interconnect. The accelerator logic may include or be a special processor adapted to perform one or more specific functions. However, the PCIe interconnect in a conventional system may only be adapted to process read and/or write commands (e.g., from the accelerator logic). To wit, the PCIe is not adapted to process more complex commands, such as read-modify-write commands which may be employed, for example, to synchronize the accelerator logic and main processor so the accelerator logic and main processor may efficiently execute different functions of a program. Accordingly, improved methods and apparatus for employing a PCIe interconnect are desired.